The present invention relates to a manufacturing method of a semiconductor device and, for example, is preferably applicable to a manufacturing method of a semiconductor device having a semiconductor element formed over a semiconductor substrate.
A semiconductor device having a memory cell region in which a memory cell such as a non-volatile memory or the like is formed over a semiconductor substrate for example and a peripheral circuit region in which a peripheral circuit comprised of a MISFET (Metal Insulator Semiconductor Field Effect Transistor) or the like is formed over the semiconductor substrate for example is widely used.
There sometimes is a case where a memory cell comprised of a split gate type cell using a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) film is formed as a non-volatile memory for example. In such a case, the memory cell comprises two MISFETs of a control transistor having a control gate electrode and a memory transistor having a memory gate electrode.
As a manufacturing method of such a semiconductor device, there is a method including the steps of: forming a resist pattern comprising a photoresist film (hereunder merely referred to as a resist film) over an etching film formed over the surface of a semiconductor substrate; and etching and patterning the etching film with the formed resist pattern used as a mask.
In Japanese Unexamined Patent Application Publication No. 2005-203508 (Patent Literature 1), disclosed is a technology of, in a step of forming an element isolation trench in a semiconductor device: depositing a silicon nitride film over the surface of a silicon substrate with a silicon oxide film interposed; and removing the silicon nitride film in an element isolation region by dry etching with a photoresist film used as a mask.